upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 188

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upd78f9211grt2-jjg-a

Manufacturer Part Number
upd78f9211grt2-jjg-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
ETC-unknow
Datasheet
188
High-speed internal oscillation clock or
Internal reset signal
Note
Note
Remark f
Crystal/ceramic
oscillation clock
Port pin
RESET
The operation stop time is 277
The operation stop time is 276
X
Internal reset signal
: System clock oscillation frequency
external clock input
<1> With high-speed internal oscillation clock or external clock input
CPU clock
Normal operation
Port pin
RESET
in progress
Figure 12-2. Timing of Reset by RESET Input
Normal operation
<2> With crystal/ceramic oscillation clock
in progress
CHAPTER 12 RESET FUNCTION
100 ns (TYP.)
µ
µ
s (MIN.), 544
s (MIN.), 544
Delay
User’s Manual U16994EJ3V0UD
100 ns (TYP.)
(oscillation stops)
Delay
Reset period
µ
µ
100 ns (TYP.)
s (TYP.), and 1.075 ms (MAX.).
s (TYP.), and 1.074 ms (MAX.).
(oscillation stops)
Delay
Reset period
100 ns (TYP.)
Delay
Oscillation stabilization
time (2
Operation stops because option
byte is referenced
10
/f
X
to 2
Hi-Z
Operation stops because option
byte is referenced
17
/f
Normal operation (reset processing, CPU clock)
X
)
Hi-Z
Normal operation
(reset processing, CPU clock)
Note 1
.
Note 1
.

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