upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 99

• Manufacturer Part Number: upd78f9211grt2-jjg-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: ETC-unknow

CR010 capture value
TM00 count value
Note The carry flag is set to 1. Ignore this setting.
(2) Measurement of two pulse widths with free-running counter
TI000 pin input
When 16-bit timer counter 00 (TM00) is operated in free-running mode, it is possible to simultaneously
measure the pulse widths of the two signals input to the TI000 pin and the TI010 pin.
Specify both the rising and falling edges as the valid edges of the TI000 and TI010 pins, by using bits 4 and 5
(ES000 and ES010) and bits 6 and 7 (ES100 and ES110) of PRM00.
When the valid edge specified by bits 4 and 5 (ES000 and ES010) of prescaler mode register 00 (PRM00) is
input to the TI000 pin, the value of TM00 is taken into 16-bit timer capture/compare register 010 (CR010) and
an interrupt request signal (INTTM010) is set.
Also, when the valid edge specified by bits 6 and 7 (ES100 and ES110) of PRM00 is input to the TI010 pin, the
value of TM00 is taken into 16-bit timer capture/compare register 000 (CR000) and an interrupt request signal
(INTTM000) is set.
Sampling is performed using the count clock cycle selected by prescaler mode register 00 (PRM00), and a
capture operation is only performed when a valid level of the TI000 or TI010 pin is detected twice, thus
eliminating noise with a short pulse width.
Caution The measurable pulse width in this operation example is up to 1 cycle of the timer counter.
Count clock
INTTM010
Figure 6-21. Timing of Pulse Width Measurement Operation by Free-Running Counter
0000H
t
and One Capture Register (with Both Edges Specified)
0001H
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
D0
(D1 − D0) × t
D0
User’s Manual U16994EJ3V0UD
D0 + 1
D1
D1
D1 + 1
(D2 − D1) × t
FFFFH
0000H
Note
D2
(D3 − D2) × t
D2
D3
D3
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