upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 140

• Manufacturer Part Number: upd78f9211grt2-jjg-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: ETC-unknow

(2) Watchdog timer enable register (WDTE)
140
Address: FF49H
Symbol
WDTE
Writing ACH to WDTE clears the watchdog timer counter and starts counting again.
This register can be set by an 8-bit memory manipulation instruction.
Reset signal generation sets this register to 9AH.
Cautions 2. After reset is released, WDTM can be written only once by an 8-bit memory
Remarks 1. f
Cautions 1. If a value other than ACH is written to WDTE, an internal reset signal is generated.
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After reset: 9AH
3. WDTM cannot be set by a 1-bit memory manipulation instruction.
4. When using the flash memory self programming by self writing, set the overflow time
2. f
3. ×:
4. Figures in parentheses apply to operation at f
2. If a 1-bit memory manipulation instruction is executed for WDTE, an internal reset
3. The value read from WDTE is 9AH (this differs from the written value (ACH)).
Figure 8-3. Format of Watchdog Timer Enable Register (WDTE)
RL
X
manipulation instruction. If writing is attempted a second time, an internal reset
signal is generated. However, at the first write, if “1” and “x” are set for WDCS4 and
WDCS3 respectively and the watchdog timer is stopped, then the internal reset
signal does not occur even if the following are executed.
for the watchdog timer so that enough everflow time is secured (Example 1-byte
writing: 200
signal is generated.
• Second write to WDTM
• 1-bit memory manipulation instruction to WDTE
• Writing of a value other than “ACH” to WDTE
: System clock oscillation frequency
: Low-speed internal oscillation clock oscillation frequency
6
Don’t care
R/W
µ
s MIN., 1-block deletion: 10 ms MIN.).
5
CHAPTER 8 WATCHDOG TIMER
User’s Manual U16994EJ3V0UD
4
3
RL
= 480 kHz (MAX.), f
2
1
X
= 10 MHz.
0