upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 144

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upd78f9211grt2-jjg-a

Manufacturer Part Number
upd78f9211grt2-jjg-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
ETC-unknow
Datasheet
144
WDTE = “ACH”
Clear WDT counter.
WDT count stops.
HALT
instruction
Figure 8-5. Status Transition Diagram When “Low-Speed Internal Oscillator Can Be Stopped by
HALT
WDT clock: f
Overflow time: 2
WDT count continues.
Interrupt
Software” Is Selected by Option Byte
X
13
/f
WDT clock = f
Select overflow time
(settable only once).
STOP
instruction
X
to 2
20
/f
X
X
WDT count stops.
STOP
WDTE = “ACH”
Clear WDT counter.
Interrupt
CHAPTER 8 WATCHDOG TIMER
User’s Manual U16994EJ3V0UD
WDT clock: f
Overflow time: 4.27 ms to 546.13 ms (MAX.)
WDT count continues.
HALT
instruction
WDT clock: f
Overflow time: 546.13 ms (MAX.)
RL
WDT count stops.
Interrupt
Reset
RL
WDT clock = f
Select overflow time
(settable only once).
HALT
STOP
instruction
RL
Interrupt
HALT instruction
LSRSTOP = 0
LSRSTOP = 1
WDCS4 = 1
WDT operation stops.
WDT count stops.
Interrupt
STOP
STOP
instruction
WDT clock: f
WDT count stops.
WDTE = “ACH”
Clear WDT counter.
RL
Interrupt

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