upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 252

• Manufacturer Part Number: upd78f9211grt2-jjg-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: ETC-unknow

252
(2) Write to internal verify
Note Perform processing to shift to normal mode in order to return to normal processing.
Remark
<1> Mode is shifted from normal mode to self programming mode (<1> to <5> in 16.8.4)
<2> Specification of source data for write
<3> Execution of byte write → Error check (<1> to <10> in 16.8.8)
<4> <3> is repeated until all data are written.
<5> Execution of internal verify → Error check (<1> to <11> in 16.8.9)
<6> Mode is shifted from self programming mode to normal mode (<1> to <5> in 16.8.5)
Figure 16-27. Example of Operation When Command Execution Time Should Be Minimized
<1> to <6> in Figure 16-27 correspond to <1> to <6> in 16.8.10 (2) above.
Figure 16-20
Figure 16- 24
Figure 16- 25
Figure 16-21
<1> to <10>
<1> to <11>
<1> to <5>
<1> to <5>
<5> Execute internal verify command
<3> Execute byte write command
<1> Shift to self programming
<2> Set source data for write
<6> Shift to normal mode
(VCERR and WEPRERR flags)
(VCERR and WEPRERR flags)
Write to internal verify
<3> Check execution result
<5> Check execution result
<4> All data written?
CHAPTER 16 FLASH MEMORY
(from Write to Internal Verify)
Normal termination
User’s Manual U16994EJ3V0UD
mode
No
Normal
Normal
Abnormal
Abnormal
Yes
Abnormal termination
Note