upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 135

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upd78f9211grt2-jjg-a

Manufacturer Part Number
upd78f9211grt2-jjg-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
ETC-unknow
Datasheet
8-bit timer counter H1
<1> The count operation is enabled by setting TMHE1 = 1. Start 8-bit timer counter H1 by masking one count
<2> The CMP11 register value can be changed during timer counter operation. This operation is asynchronous
<3> When the values of 8-bit timer counter H1 and the CMP01 register match, the value of 8-bit timer counter H1
<4> If the CMP11 register value is changed, the value is latched and not transferred to the register. When the
<5> When the values of 8-bit timer counter H1 and the CMP11 register after the change match, the TOH1 output
<6> Clearing the TMHE1 bit to 0 during timer H1 operation makes the INTTMH1 signal and TOH1 output inactive.
(TOLEV1 = 0)
Count clock
clock to count up. At this time, the TOH1 output remains inactive (when TOLEV1 = 0).
to the count clock.
is cleared, the TOH1 output becomes active, and the INTTMH1 signal is output.
values of 8-bit timer counter H1 and the CMP11 register before the change match, the value is transferred to
the CMP11 register and the CMP11 register value is changed (<2>’).
However, three count clocks or more are required from when the CMP11 register value is changed to when
the value is transferred to the register. If a match signal is generated within three count clocks, the changed
value cannot be transferred to the register.
becomes inactive. 8-bit timer counter H1 is not cleared and the INTTMH1 signal is not generated.
INTTMH1
TMHE1
CMP01
CMP11
TOH1
(e) Operation by changing CMP11 (CMP11 = 02H → 03H, CMP01 = A5H)
00H 01H 02H
<1>
Figure 7-10. Operation Timing in PWM Output Mode (4/4)
01H
<2>
CHAPTER 7 8-BIT TIMER H1
A5H 00H 01H 02H 03H
User’s Manual U16994EJ3V0UD
<3>
01H (03H)
<2>'
<4>
A5H
03H
A5H 00H 01H 02H 03H
<5>
A5H 00H
<6>
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