upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 74
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upd78f9211grt2-jjg-a
Manufacturer Part Number
upd78f9211grt2-jjg-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
ETC-unknow
Datasheet
1.UPD78F9211GRT2-JJG-A.pdf
(352 pages)
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74
Remark PCC:
(a) The internal reset signal is generated by the power-on clear function on power application, the option byte is
(b) The option byte is referenced and the system clock is selected. Then the high-speed internal oscillation
referenced after reset, and the system clock is selected.
clock operates as the system clock.
PPCC: Preprocessor clock control register
Figure 5-9. Status Transition of Default Start by High-Speed internal oscillation
Processor clock control register
Interrupt
HALT
CHAPTER 5 CLOCK GENERATORS
instruction
High-speed internal
Clock division ratio
oscillator selected
HALT
power-on clear
variable during
CPU operation
by option byte
User’s Manual U16994EJ3V0UD
Reset by
application
Power
instruction
V
Start with PCC = 02H,
PPCC = 02H
STOP
DD
> 2.1 V ±0.1 V
STOP
Interrupt
Reset signal
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