upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 67

• Manufacturer Part Number: upd78f9211grt2-jjg-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: ETC-unknow

5.3
The clock generators are controlled by the following four registers.
• Processor clock control register (PCC)
• Preprocessor clock control register (PPCC)
• Low-speed internal oscillation mode register (LSRCM)
• Oscillation stabilization time select register (OSTS)
(1) Processor clock control register (PCC) and preprocessor clock control register (PPCC)
Address: FFFBH, After reset: 02H, R/W
Symbol
PCC
Address: FFF3H, After reset: 02H, R/W
Symbol
PPCC
Registers Controlling Clock Generators
These registers are used to specify the division ratio of the system clock.
PCC and PPCC are set by using a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets PCC and PPCC to 02H.
Notes 1.
PPCC1
7
0
7
0
0
0
0
1
0
1
Figure 5-3. Format of Preprocessor Clock Control Register (PPCC)
2. If PPCC = 02H, the clock (f
Figure 5-2. Format of Processor Clock Control Register (PCC)
Other than above
If PPCC = 01H, the clock (f
PPCC0
6
0
6
0
0
1
0
0
1
0
CHAPTER 5 CLOCK GENERATORS
PCC1
5
0
5
0
0
0
1
0
1
1
User’s Manual U16994EJ3V0UD
f
f
f
f
f
f
Setting prohibited
X
X
X
X
X
X
/2
/2
/2
/2
/2
XP
XP
2
2 Note 2
3 Note 1
4 Note 2
Note 1
) supplied to the peripheral hardware is f
) supplied to the peripheral hardware is f
4
0
4
0
3
0
3
0
Selection of CPU clock (f
2
0
2
0
PPCC1
PCC1
CPU
1
1
)
X
X
/2
/2.
2
.
PPCC0
0
0
0
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