upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 227

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upd78f9211grt2-jjg-a

Manufacturer Part Number
upd78f9211grt2-jjg-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
ETC-unknow
Datasheet
(4) Flash programming command register (FLCMD)
3. Operating conditions of WEPRERR flag
<Reset conditions>
<Setting conditions>
<Reset conditions>
• When 0 is written to the VCERR flag
• When the reset signal generation
• If the area specified by the protect byte to be protected from erasing or writing is specified by the flash
• If 1 is written to a bit that has not been erased (a bit for which the data is 0).
• When 0 is written to the WEPRERR flag
• When the reset signal generation
This register is used to specify whether the flash memory is erased, written, or verified in the self-programming
mode.
This register is set by using a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
If VCERR is set, it means that the flash memory has not been erased or written correctly. Erase or write the
memory again in the specified procedure.
Remark The VCERR flag may also be set if an erase or write protect error occurs.
address pointer H (FLAPH) and a command is executed to this area
CHAPTER 16 FLASH MEMORY
User’s Manual U16994EJ3V0UD
227

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