upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 36

• Manufacturer Part Number: upd78f9211grt2-jjg-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: ETC-unknow

36
(3) Stack pointer (SP)
SP
SP
SP
This is a 16-bit register to hold the start address of the memory stack area. Only the internal high-speed RAM
area can be set as the stack area (Other than the internal high-speed RAM area cannot be set as the stack
area).
The SP is decremented before writing (saving) to the stack memory and is incremented after reading
(restoring) from the stack memory.
Each stack operation saves/restores data as shown in Figures 3-10 and 3-11.
Caution Since reset signal generation makes the SP contents undefined, be sure to initialize the SP
SP15
SP _ 2
SP _ 2
SP _ 1
SP + 1
SP + 2
15
SP
SP
SP14
before using the stack memory.
SP13 SP12 SP11 SP10 SP9
Lower half
register pairs
Upper half
register pairs
Lower half
register pairs
Upper half
register pairs
POP rp
instruction
PUSH rp
instruction
Figure 3-11. Data to Be Restored from Stack Memory
Figure 3-10. Data to Be Saved to Stack Memory
Figure 3-9. Stack Pointer Configuration
SP
SP
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U16994EJ3V0UD
SP _ 2
SP _ 2
SP _ 1
SP + 1
SP + 2
SP
SP
SP8
RET instruction
PC15 to PC8
PC15 to PC8
PC7 to PC0
CALL, CALLT
instructions
PC7 to PC0
SP7
SP6
SP5
SP
SP
SP4
SP _ 3
SP _ 3
SP _ 2
SP _ 1
SP + 1
SP + 2
SP + 3
SP
SP
SP3
SP2
RETI instruction
PC15 to PC8
PC15 to PC8
PC7 to PC0
PC7 to PC0
SP1
Interrupt
PSW
PSW
SP0
0