upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 189

• Manufacturer Part Number: upd78f9211grt2-jjg-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: ETC-unknow

High-speed internal oscillation clock or
Internal reset signal
Watchdog overflow
Note
Caution The watchdog timer is also reset in the case of an internal reset of the watchdog timer.
Note
Caution The watchdog timer is also reset in the case of an internal reset of the watchdog timer.
Remark f
oscillation clock
Crystal/ceramic
CPU clock
Port pin
The operation stop time is 277
The operation stop time is 276
X
Internal reset signal
: System clock oscillation frequency
external clock input
Watchdog overflow
<1> With high-speed internal oscillation clock or external clock input
CPU clock
Normal operation
Port pin
Figure 12-3. Timing of Reset by Overflow of Watchdog Timer
in progress
Normal operation
<2> With crystal/ceramic oscillation clock
in progress
CHAPTER 12 RESET FUNCTION
µ
µ
s (MIN.), 544
s (MIN.), 544
User’s Manual U16994EJ3V0UD
(oscillation stops)
Reset period
µ
µ
s (TYP.), and 1.075 ms (MAX.).
s (TYP.), and 1.074 ms (MAX.).
(oscillation stops)
Reset period
Oscillation stabilization
time (2
Operation stops because option
byte is referenced
10
/f
X
to 2
Hi-Z
Operation stops because option
byte is referenced
17
/f
X
Normal operation (reset processing, CPU clock)
)
Hi-Z
Normal operation
(reset processing, CPU clock)
Note 1
.
Note 1
.
189