upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 190

• Manufacturer Part Number: upd78f9211grt2-jjg-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: ETC-unknow

190
High-speed internal oscillation clock or
Internal reset signal
Note
Note
Remarks 1. For the reset timing of the power-on-clear circuit and low-voltage detector, refer to CHAPTER 13
oscillation clock
Crystal/ceramic
CPU clock
Port pin
RESET
The operation stop time is 277
The operation stop time is 276
2. f
Internal reset signal
external clock input
POWER-ON-CLEAR CIRCUIT and CHAPTER 14 LOW-VOLTAGE DETECTOR.
X
: System clock oscillation frequency
in progress
operation
<1> With high-speed internal oscillation clock or external clock input
CPU clock
Normal
STOP instruction is executed.
RESET
Port pin
Figure 12-4. Reset Timing by RESET Input in STOP Mode
in progress
operation
STOP instruction is executed.
Normal
<2> With crystal/ceramic oscillation clock
(oscillation stops)
Stop status
100 ns (TYP.)
CHAPTER 12 RESET FUNCTION
µ
µ
s (MIN.), 544
Delay
s (MIN.), 544
User’s Manual U16994EJ3V0UD
(oscillation stops)
Stop status
100 ns (TYP.)
(oscillation stops)
Reset period
Delay
100 ns (TYP.)
µ
µ
Delay
s (TYP.), and 1.075 ms (MAX.).
s (TYP.), and 1.074 ms (MAX.).
(oscillation stops)
Reset period
100 ns (TYP.)
Delay
Oscillation stabilization
time (2
Operation stops because option
byte is referenced
10
/f
X
to 2
Hi-Z
17
Operation stops because option
byte is referenced
/f
X
)
Normal operation (reset processing, CPU clock)
Hi-Z
Normal operation
(reset processing, CPU clock)
Note 1
.
Note 1
.