upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 241

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upd78f9211grt2-jjg-a

Manufacturer Part Number
upd78f9211grt2-jjg-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
ETC-unknow
Datasheet
Note This setting is not required when the watchdog timer is not used.
Remark
<1> to <11>in Figure 16-23 correspond to <1> to <11> in 16.8.7 (previous page).
Figure 16-23. Example of Block Blank Check Operation in Self Programming Mode
<7> Clear & restart WDT counter
<8> Execute HALT instruction
<4> Set the same value as
that of FLAPH to FLAPHC
command (FLCMD = 04H)
<2> Set no. of block for
<5> Set FLAPLC to 00H
<11> Normal termination
<1> Set block blank check
<3> Set FLAPL to 00H
(VCERR and WEPRERR flags)
blank check to FLAPH
<9> Check execution result
Block blank check
(WDTE = ACH)
<6> Clear PFS
Normal
CHAPTER 16 FLASH MEMORY
User’s Manual U16994EJ3V0UD
Note
Abnormal
<10> Abnormal termination
241

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