upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 229

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upd78f9211grt2-jjg-a

Manufacturer Part Number
upd78f9211grt2-jjg-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
ETC-unknow
Datasheet
(6) Flash address pointer H compare register and flash address pointer L compare register (FLAPHC and
FLAPLC)
These registers are used to specify the address range in which the internal sequencer operates when the flash
memory is verified in the self-programming mode.
Set FLAPHC to the same value as that of FLAPH. Set the last address of the range in which verification is to
be executed to FLAPLC.
These registers are set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
Caution Be sure to clear bits 4 to 7 of flash address pointer H (FLAPH) and flash address pointer H
Figure 16-17. Format of Flash Address Pointer H/L Compare Registers (FLAPHC/FLAPLC)
Cautions 1. Be sure to clear bits 4 to 7 of FLAPH and FLAPHC to 0 before executing the self
Address: FFA4H, FFA5H
Address: FFA6H, FFA7H
0
0
0
0
compare register (FLAPHC) to 0 before executing the self programming command. If the
value of these bits is 1 when executing the self programming command.
3. Clear FLAPLC to 00H when a block erase is performed, and set this register to FFH
2. Set the number of the block subject to a block erase, verify, or blank check (same
Figure 16-16. Format of Flash Address Pointer H/L (FLAPH/FLAPL)
programming command.
programming command.
value as FLAPH) to FLAPHC.
when a blank check is performed.
0
0
FLAPHC (FFA7H)
FLAPH (FFA5H)
0
0
FLAP
FLA
P11
C11
After reset: 00H
After reset: 00H
FLAP
FLA
P10
C10
CHAPTER 16 FLASH MEMORY
User’s Manual U16994EJ3V0UD
FLAP
FLA
P9
C9
FLAP
FLA
If the value of these bits is 1 when executing the self
P8
C8
R/W
R/W
FLAP
FLA
P7
C7
FLAP
FLA
P6
C6
FLAP
FLA
P5
C5
FLAPLC (FFA6H)
FLAPL (FFA4H)
FLAP
FLA
P4
C4
FLAP
FLA
P3
C3
FLAP
FLA
P2
C2
FLAP
FLA
P1
C1
FLAP
FLA
P0
C0
229

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