upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 174

• Manufacturer Part Number: upd78f9211grt2-jjg-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: ETC-unknow

Before each interrupt request acknowledgement, the EI instruction is issued, the interrupt mask is released, and the
interrupt request acknowledgement enable state is set.
INTyy is not acknowledged, and multiple interrupts are not generated. The INTyy request is held pending and
acknowledged after the INTxx servicing is performed.
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During interrupt INTxx servicing, interrupt request INTyy is acknowledged, and multiple interrupts are generated.
Caution Multiple interrupts can be acknowledged even for low-priority interrupts.
Because interrupts are not enabled in interrupt INTxx servicing (the EI instruction is not issued), interrupt request
IE = 0: Interrupt request acknowledgment disabled
Example 2. Multiple interrupts are not generated because interrupts are not enabled
INTxx
INTxx
Main processing
Main processing
EI
EI
Example 1. Multiple interrupts are acknowledged
Figure 10-9. Example of Multiple Interrupts (1/2)
IE = 0
IE = 0
CHAPTER 10 INTERRUPT FUNCTIONS
User’s Manual U16994EJ3V0UD
INTyy
INTyy
INTxx servicing
IE = 0
INTxx servicing
RETI
RETI
EI
IE = 0
INTyy is held pending
INTyy servicing
RETI
INTyy servicing
RETI