upd78f9211grt2-jjg-a ETC-unknow, upd78f9211grt2-jjg-a Datasheet - Page 88

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upd78f9211grt2-jjg-a

Manufacturer Part Number
upd78f9211grt2-jjg-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
ETC-unknow
Datasheet
88
(2) Capture/compare control register 00 (CRC00)
Remark
This register controls the operation of the 16-bit capture/compare registers (CR000, CR010).
CRC00 is set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets the value of CRC00 to 00H.
Note When the CRC001 bit value is 1, capture is not performed if both the rising and falling edges have been
Cautions 1. The timer operation must be stopped before setting CRC00.
Address: FF62H After reset: 00H R/W
Symbol
CRC00
selected as the valid edges of the TI000 pin.
2. When the clear & start mode entered on a match between TM00 and CR000 is selected by
3. To ensure the reliability of the capture operation, the capture trigger requires a pulse
16-bit timer mode control register 00 (TMC00), CR000 should not be specified as a
capture register.
longer than two cycles of the count clock selected by prescaler mode register 00
(PRM00) (refer to Figure 6-18).
Figure 6-6. Format of Capture/Compare Control Register 00 (CRC00)
CRC002
CRC001
CRC000
TM00:
CR000:
CR010:
7
0
0
1
0
1
0
1
Operate as compare register
Operate as capture register
Capture on valid edge of TI010 pin
Capture on valid edge of TI000 pin by reverse phase
Operate as compare register
Operate as capture register
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
16-bit timer counter 00
16-bit timer capture/compare register 000
16-bit timer capture/compare register 010
6
0
User’s Manual U16994EJ3V0UD
5
0
CR010 operating mode selection
CR000 operating mode selection
CR000 capture trigger selection
4
0
3
0
Note
CRC002
2
CRC001
1
CRC000
0

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