cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 101

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cx28224

Manufacturer Part Number
cx28224
Description
Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
Manufacturer
Mindspeed Technologies
Datasheet
Table 7-1. Address Ranges
28229-DSH-001-D
0000–003F
0040–007F
0080–00BF
00C0–00FF
0100–013F
0140–017F
0180–01BF
01C0–01FF
0200–0208
0209–300
300–30D
320–32D
340–34D
360–36D
380–38D
3A0–3AD
3C0–3CD
3E0–3ED
0400–07FF
Address Range (Hex)
7
Port Offset
Registers
The CX2822x registers control and observe the device’s operations.
the address ranges that represent a device control and status range. The registers in
each port range are replicated for the other ports.
control and status registers.
All registers are 8 bits wide. All control registers can be read to verify contents.
NOTE:
Port 0 Control and Status Registers
Port 1 Control and Status Registers
Port 2 Control and Status Registers
Port 4 Control and Status Registers
Port 5 Control and Status Registers
Port 6 Control and Status Registers
Device Control and Status Registers
Reserved, set to a logical 0.
Reserved, set to a logical 0.
Reserved, set to a logical 0.
Reserved, set to a logical 0.
Reserved, set to a logical 0.
Reserved, set to a logical 0.
Reserved, set to a logical 0.
Port 3 Control and Status Registers
Port 7 Control and Status Registers
Reserved, set to a logical 0.
Reserved, set to a logical 0.
IMA Control and Status Registers
Control bits that do not have a documented function are reserved and
must be written to a logical 0.
Mindspeed Technologies
Description
Table 7-3
lists the port-level control and status registers.
Table 7-2
lists the device-level
Port Base Address
Table 7-1
(Hex)
0000
0040
0080
00C0
0100
0140
0180
01C0
lists
7
-
1

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