cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 57
cx28224
Manufacturer Part Number
cx28224
Description
Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28224.pdf
(271 pages)
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CX28224/5/9 Data Sheet
Table 2-5. CX28229 Pin Descriptions (8 of 12)
28229-DSH-001-D
atmUTxAddr[0]
atmUTxAddr[1]
atmUTxAddr[2]
atmUTxAddr[3]
atmUTxAddr[4]
atmUTxData[0]
atmUTxData[1]
atmUTxData[2]
atmUTxData[3]
atmUTxData[4]
atmUTxData[5]
atmUTxData[6]
atmUTxData[7]
atmUTxData[8]
atmUTxData[9]
atmUTxData[10]
atmUTxData[11]
atmUTxData[12]
atmUTxData[13]
atmUTxData[14]
atmUTxData[15]
atmUTxPrty
Pin Label
ATM UTOPIA
Transmit Address
ATM UTOPIA
Transmit Data
ATM UTOPIA
Transmit Parity
Signal Name
Mindspeed Technologies
D14
D13
D16
D15
D12
H15
G14
G13
G16
G15
No.
E15
C16
C15
B16
B15
B14
B13
A14
F14
A16
A15
A13
I/PD
I/PD
I/PD
I/PD
I/PD
I/PD
I/PD
I/PD
I/O
I
I
I
I
I
I
I
I
I
I
Transmit ATM Cell Bus address.
Transmit direction ATM side cell data.
Parity status signal. In 8 bit Utopia mode, a parity
calculation is performed over atmUTxData[7:0] for each
clock cycle of atmUTxClk. Odd parity is used. In 16 bit
Utopia mode, this signal is the parity of atmUTxData[15:0].
This signal is optional.
™
Description
CX2822x Hardware Description
2
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