cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 86

• Manufacturer Part Number: cx28224
• Description: Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
• Manufacturer: Mindspeed Technologies

Transmission Convergence Block
Figure 5-3. Header Error Check Process
5.2.2
5-4
Errors Detected
(Drop Cell)
Processing Non-Standard Traffic Using the CX28229
Detection
When the CX2822x is in general purpose mode, a synchronization pulse from the
framer interface is not always available. In this mode, the CX2822x performs a bit
serial search to find byte and cell alignment. The CX2822x selects a starting window
of 32 sequential bits and calculates the HEC over this window. This HEC is then
compared to the next eight incoming bits. If they do not match, the CX2822x shifts
the 32-bit window by 1 bit and recalculates the HEC until a valid HEC position is
found. Once byte-alignment is achieved, cell delineation is performed.
The CX28229 contains two independent "HEC Check" state machines. The Cell
Delineator (CD) State Machine is used to find Cell Delineation and, conversely, to
declare loss of cell delineation (LOCD). The other is the Cell Valid (CV) State
Machine, which is used to validate the cells to pass to the UTOPIA FIFOs.
These state machines are controlled by two register bits, (CVAL register, 0x0C), that
allow the CX28229 to be programmed for special applications.
control bits function.
Mode
Apparent Multi-bit Error (Drop Cell)
Mindspeed Technologies
(Correct Error and Pass Cell)
Apparent Single-bit Error
Cell Delineation in Sync State
No Errors Detected (Pass Cell)
™
Correction
Mode
No Errors Detected
(Pass Cell)
Table 5-1
CX28224/5/9 Data Sheet
28229-DSH-001-D
shows the
500027_007