cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 191

• Manufacturer Part Number: cx28224
• Description: Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
• Manufacturer: Mindspeed Technologies

CX28224/5/9 Data Sheet
28229-DSH-001-D
Bit
7
6
5
4
3
2
1
0
Default
0
0
0
0
0
0
0
0
0x71F—IMA_GRP_13TO16_SEM (Group Table Control IV (CX28229 Only))
Update Enable for Receive group 16
Update Enable for Receive group 15
Update Enable for Receive group 14
Update Enable for Receive group 13
Update Enable for Transmit group 16
Update Enable for Transmit group 15
Update Enable for Transmit group 14
Update Enable for Transmit group 13
For the following bits, 1 = the group table is being updated, 0 = the group table is not
being updated. The update enable must be set to 1 prior to writing the group table. All
elements of the group table must be re-written. After writing to all 8 elements, the
update enable is reset to 0. The group tables are described below.
NOTE:
Name
This register cannot be read back.
Mindspeed Technologies
addresses 0x7DC–0x7DF (Not defined for CX28224 and CX28225)
addresses 0x7D8–0x7DB (Not defined for CX28224 and CX28225)
addresses 0x7D4–0x7D7 (Not defined for CX28224 and CX28225)
addresses 0x7D0–0x7D3 (Not defined for CX28224 and CX28225)
addresses 0x738–0x73F (Not defined for CX28224 and CX28225)
addresses 0x730–0x737 (Not defined for CX28224 and CX28225)
addresses 0x728–0x72F (Not defined for CX28224 and CX28225)
addresses 0x720–0x727 (Not defined for CX28224 and CX28225)
™
Description
Registers
7
-
91