cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 161
cx28224
Manufacturer Part Number
cx28224
Description
Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28224.pdf
(271 pages)
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CX28224/5/9 Data Sheet
28229-DSH-001-D
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Default
Default
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0x38—RXCNTL (Received Cell Counter [Low Byte])
0x39—RXCNTM (Received Cell Counter [Mid Byte])
RxCnt[7]
RxCnt[6]
RxCnt[5]
RxCnt[4]
RxCnt[3]
RxCnt[2]
RxCnt[1]
RxCnt[0]
RxCnt[15]
RxCnt[14]
RxCnt[13]
RxCnt[12]
RxCnt[11]
RxCnt[10]
RxCnt[9]
RxCnt[8]
The RXCNTL counter tracks the number of received cells. This byte of the counter
should be read first. The counter is cleared on read.
The RXCNTM register tracks the number of received cells. The counter is cleared on
read.
Name
Name
Mindspeed Technologies
Received cell counter bit 7.
Received cell counter bit 6.
Received cell counter bit 5.
Received cell counter bit 4.
Received cell counter bit 3.
Received cell counter bit 2.
Received cell counter bit 1.
Received cell counter bit 0 (LSB).
Received cell counter bit 15.
Received cell counter bit 14.
Received cell counter bit 13.
Received cell counter bit 12.
Received cell counter bit 11.
Received cell counter bit 10.
Received cell counter bit 9.
Received cell counter bit 8.
Description
Description
™
Registers
7
-
61
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