cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 172

no-image

cx28224

Manufacturer Part Number
cx28224
Description
Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
Manufacturer
Mindspeed Technologies
Datasheet
Registers
7-72
7–0
Bit
Default
0x40A—IMA_LNK_DIFF_DEL (IMA Link Differential Delay Write Counter)
Link Delay Write
Counter
This register, along with bit 5 of address 0x409, reports the value of the SRAM write
phase at the time when the read phase is 0. This phase information is used to calculate
the link differential delay.
Name
Mindspeed Technologies
This field contains a snapshot of 8 of the least significant bits of the SRAM write
counter for the diagnostic link (selected using address 0x409).
All others (Range: 0x00–0xFF)
Delay Window = 0 (see register 0x415): Value = Cell_count >> 1
Delay Window = 1–3 (see register 0x415): Value = Cell_count
Delay Window = 4 (see register 0x415): Value = Cell_count >> 2
Description
CX28224/5/9 Data Sheet
28229-DSH-001-D

Related parts for cx28224