cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 51

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cx28224

Manufacturer Part Number
cx28224
Description
Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
Manufacturer
Mindspeed Technologies
Datasheet
CX28224/5/9 Data Sheet
Table 2-5. CX28229 Pin Descriptions (2 of 12)
28229-DSH-001-D
MAS*, MWr*
MicroAddr[0]
MicroAddr[1]
MicroAddr[2]
MicroAddr[3]
MicroAddr[4]
MicroAddr[5]
MicroAddr[6]
MicroAddr[7]
MicroAddr[8]
MicroAddr[9]
MicroAddr[10]
MicroData[0]
MicroData[1]
MicroData[2]
MicroData[3]
MicroData[4]
MicroData[5]
MicroData[6]
MicroData[7]
MicroInt*
Pin Label
Microprocessor
Address Strobe
Microprocessor
Address Bus
Microprocessor Data
Bus
Microprocessor
Interrupt Request
Signal Name
Mindspeed Technologies
No.
M4
D2
D1
N3
N4
N1
N2
R1
R2
A1
B1
C2
E4
C1
E3
F4
E2
E1
P2
P1
T1
I/O
I/O
O
I
I
When MSyncMode is asserted high, this pin is an address
strobe pin. When the MAS* pin is asserted low, it indicates
a valid address, MicroAddr[10:0]. This signal is used to
qualify read and write accesses.
When MSyncMode is asserted low, this pin is a write
control pin. When MWr* is asserted low, a write access is
enabled and the MicroData[7:0] pin values will be written
to the memory location indicated by the MicroAddr[10:0]
pins. The write access assumes the device is chip selected
(MCS* = 0), a read access is not being requested (MRd* =
1), and the device is not being reset (Reset* = 1).
These 11 bits are an address input for identifying the
register to access.
A bi-directional data bus for reading and writing data to
internal registers.
When active low, the device needs servicing. It remains
active until the pending interrupt is processed by the
Interrupt Service Routine. This pin is an open drain output
for an external wired OR logic implementation. An external
pull-up resistor is required for this pin.
Description
CX2822x Hardware Description
2
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23

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