cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 187
cx28224
Manufacturer Part Number
cx28224
Description
Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28224.pdf
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CX28224/5/9 Data Sheet
28229-DSH-001-D
4–0
Bit
7
6
5
Default
0x00
—
—
—
0x458—IMA_RX_SOC_DETECTOR (PHY Utopia RX_SOC Detector)
Loss of Start of Cell
Port Number
This register is used to monitor phyURxSOC for conditions where a cell transfer
occurs without an assertion of the Start-of-cell signal. Use of this register requires first
setting the port address in bits 4–0 and then reading the state of the Loss-of-start-of-
cell in bit 7.
Name
—
—
Mindspeed Technologies
This bit indicates that a cell transfer occurred for the selected port and phyURxSOC
was not asserted. This occurrence is saved internally until the state is read using
this register. The read operation will clear the internal state.
Reserved. Set to 0.
Reserved. Set to 0.
This field contains the PHY Cell Bus Address of the SOC being examined
CX28224: 0–1: Port 0–1
CX28225: 0–3: Port 0–3
CX28229: 0–0x1F: Port 0–31
Description
™
Registers
7
-
87
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