cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 179

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cx28224

Manufacturer Part Number
cx28224
Description
Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
Manufacturer
Mindspeed Technologies
Datasheet
CX28224/5/9 Data Sheet
28229-DSH-001-D
7–0
2–0
Bit
7
6
5
4
3
Default
0x00
0x415—IMA_DIFF_DELAY_DATA (IMA Differential Delay Control Data)
Differential Delay
Threshold
Delay Window
Name
Mindspeed Technologies
This field contains the cell offset that corresponds to differential delay threshold
setting for the group.
Reserved. Set to 0.
Reserved. Set to 0.
Reserved. Set to 0.
Reserved. Set to 0.
Reserved. Set to 0.
This field contains the number of IMA frames (assuming M=128) that are examined
when setting the differential delay buffer. This field is set based on the facility
payload rate.
Delay Window = 0, 5: Value = 255–(Cell_count >> 1)
Delay Window = 1–3, 6–7: Value = 255–Cell_count
Delay Window = 4: Value = 255–(Cell_count >> 2)
0 = 8 frames (1024 cells), for payload rates ≥ 1024 kbps
1 = 4 frames (512 cells), for 1024 kbps > payload rates ≥ 512 kbps
2 = 2 frames (256 cells), for 512 kbps > payload rates ≥ 256 kbps
3 = 1 frame (128 cells), for payload rates < 256 kbps
4 = 16 frames (2048 cells), for payload rates ≥ 1024 kbps
5 = 8 frames (1024 cells), for 1024 kbps > payload rates ≥ 512 kbps
6 = 4 frames (512 cells), for 512 kbps > payload rates ≥ 256 kbps
7 = 2 frame (256 cells), for payload rates < 256 kbps
For Control Type = 0
For Control Type = 1
Description
Registers
7
-
79

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