cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 185
cx28224
Manufacturer Part Number
cx28224
Description
Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28224.pdf
(271 pages)
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CX28224/5/9 Data Sheet
28229-DSH-001-D
4–0
5–0
Bit
7
6
5
Default
—
—
0x41B—IMA_TX_TRANS_TABLE (IMA Transmit Translation Table Address)
Translation Type
ATM Utopia Address
Internal IMA Channel For Type 1, this field contains the IMA internal channel address.
This register is used in conjunction with 0x41C for configure the translation between
the ATM side Utopia addresses and the internal channels (bypass ports and IMA
groups) associated with the IMA core. Register 0x41B and 0x41C are an indirect
register pair in that a address is selected using register 0x41B and the configuration
for that address is programmed using register 0x41C.
Name
—
—
Mindspeed Technologies
0 = the value in bits 5–0 enables ATM address –> IMA internal channel translations
1 = the value in bits 5–0 enables IMA internal channel –> ATM address translations
Don’t care. Ignore.
Don’t care. Ignore.
For Type 0, this field contains the ATM Side Utopia address.
Range 0x00–0x1F: Bypass Transmit Port
Range 0x20–0x2F: IMA Group
Range: 0x00–0x1F
CX28224: 0–1: Port 0–1
CX28225: 0–3: Port 0–3
CX28229: 0–0x1F: Port 0–31
CX28224: 0x20–0x21: IMA Group 1–2
CX28225: 0x20–0x23: IMA Group 1–4
CX28229: 0x20–0x2F: IMA Group 1–16
For Translation Type = 0
For Translation Type = 1
Description
™
Registers
7
-
85
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