cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 150
cx28224
Manufacturer Part Number
cx28224
Description
Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28224.pdf
(271 pages)
- Current page: 150 of 271
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Registers
7-50
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Default
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0x21—RXIDL2 (Receive Idle Cell Header Control Register 2)
0x22—RXIDL3 (Receive Idle Cell Header Control Register 3)
RxIdl2[7]
RxIdl2[6]
RxIdl2[5]
RxIdl2[4]
RxIdl2[3]
RxIdl2[2]
RxIdl2[1]
RxIdl2[0]
RxIdl3[7]
RxIdl3[6]
RxIdl3[5]
RxIdl3[4]
RxIdl3[3]
RxIdl3[2]
RxIdl3[1]
RxIdl3[0]
The RXIDL2 register contains the second byte of the Receive Idle Cell Header. (See
0x20—RXIDL1.)
The RXIDL3 register contains the third byte of the Receive Idle Cell Header. (See
0x20—RXIDL1.)
Name
Name
Mindspeed Technologies
These bits hold the Receive Idle cell header for Octet 2 of the incoming cell.
These bits hold the Receive Idle cell header for Octet 3 of the incoming cell.
Description
Description
™
CX28224/5/9 Data Sheet
28229-DSH-001-D
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