cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 92
cx28224
Manufacturer Part Number
cx28224
Description
Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28224.pdf
(271 pages)
- Current page: 92 of 271
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Transmission Convergence Block
Figure 5-5. Transmit Waveforms
Figure 5-6. Receive Waveforms
5-10
General Notes:
General Notes:
SPTxSync
SPTxData
SPRxSync
SPTxClk
SPRxData
SPRxClk
The diagram shows the CX28229 programmed to sample on the rising edge of the clock.
For T
T
For T
The diagram shows the CX28229 programmed to sample on the rising edge of the clock.
The Overhead bit is sampled on the clock edge 0.
For T
T
For T
2
2
must have a minimum of 1 clock period.
must have a minimum of 1 clock period.
1
3
1
3
, SPTxSync must occur at least 10 ns after the rising edge of the 193rd clock.
, the hold time is 10 ns after the rising edge of the clock.
, SPRxSync must occur at least 10 ns after the rising edge of the 193rd clock.
, the hold time is 10 ns after the rising edge of the clock.
T
T
1
1
192
192
Overhead
Overhead
T
T
2
2
0
0
MSB Octet 1
MSB Octet 1
Mindspeed Technologies
T
T
3
3
1
1
bit 6 - Octet 1
bit 6 - Octet 1
2
2
™
3
3
CX28224/5/9 Data Sheet
28229-DSH-001-D
500027_064
500027_066
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