cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 81

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cx28224

Manufacturer Part Number
cx28224
Description
Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
Manufacturer
Mindspeed Technologies
Datasheet
CX28224/5/9 Data Sheet
4.5
Figure 4-1. CX28229 Multiple UTOPIA Control Lines
28229-DSH-001-D
General Note:
Only the Transmit side is shown for clarity. The Receive side is identical.
UTOPIA bus
ATM Layer
PHY Side UTOPIA
An ATM forum compliant UTOPIA interface is provided for interfacing to PHY layer
devices. Several unique features should be noted:
1.
2.
3.
It is only UTOPIA level 2.
This bus only supports an 8 bit wide data path. This was done to simplify routing
issues and reduce pin count.
The UTOPIA interface has a second set of control lines, which allow 32
addresses. These can be connected as shown in
provides two buses with 16 devices each, all sharing common address and data
lines but with separate control lines. (Remember, UTOPIA uses address 0x31 as
the null address thus limiting the bus to 31 ports. However, the standard also
allows for multiple ClAv and Enable lines.)
CX28229
Mindspeed Technologies
phyUTxClav_0
phyUTxEnb_0
phyUTxClav_1
phyUTxEnb_1
UTOPIA data/
address bus
Figure
UTOPIA Port 8−15
UTOPIA Port 8−15
UTOPIA Port 0−7
UTOPIA Port 0−7
RS8228
RS8228
RS8228
RS8228
4-1. This effectively
UTOPIA Interfaces
IMA Link
Number
1
8
9
16
17
24
25
32
500027_056
4
-
5

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