cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 37

• Manufacturer Part Number: cx28224
• Description: Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
• Manufacturer: Mindspeed Technologies

CX28224/5/9 Data Sheet
Table 2-3. CX2822x Pin Descriptions (4 of 12)
28229-DSH-001-D
MemAddr[0]
MemAddr[1]
MemAddr[2]
MemAddr[3]
MemAddr[4]
MemAddr[5]
MemAddr[6]
MemAddr[7]
MemAddr[8]
MemAddr[9]
MemAddr[10]
MemAddr[11]
MemAddr[12]
MemAddr[13]
MemAddr[14]
MemAddr[15]
MemAddr[16]
MemAddr[17]
MemAddr[18]
MemAddr[19]
MemCtrl_CE*
MemCtrl_OE*
MemCtrl_WE*
MemCtrl_CLK
MemCtrl_ADSC
Pin Label
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Differential Delay
Memory Address Bus
Chip Enable
Output Enable
Write Enable
SRAM Clock
Address Enable
Signal Name
Mindspeed Technologies
No.
M3
G4
G3
G2
H4
G1
H3
H1
H2
K3
K4
K1
K2
P3
L3
L4
L1
L2
F3
F2
F1
J4
J3
J1
J2
I/O
O
O
O
O
O
O
Receive SRAM Address Bus.
These signals are enabled by tying the ExtMemSel pin
high.
Receive SRAM Device Select (active low) control signal.
This signal is enabled by pulling the ExtMemSel pin high.
Receive SRAM Device Output (active low) control signal.
This signal is enabled by pulling the ExtMemSel pin high.
Receive SRAM write enable (active low) control signal.
This signal is enabled by pulling the ExtMemSel pin high.
Receive SRAM clock signal.
This signal is enabled by pulling the ExtMemSel pin high.
Receive SRAM address enable (active low) address strobe.
This signal is enabled by pulling the ExtMemSel pin high.
™
Description
CX2822x Hardware Description
2
-
9