cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 175

• Manufacturer Part Number: cx28224
• Description: Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
• Manufacturer: Mindspeed Technologies

CX28224/5/9 Data Sheet
28229-DSH-001-D
7–6
3–0
Bit
5
4
Default
—
—
0
0
0x410—IMA_TIM_REF_MUX_CTL_ADDR
(IMA Timing Reference Multiplexer Control Address)
Multiplexer Type
Multiplexer ID
This register is used in conjunction with 0x411 to configure various timing elements
within the IMA core. Register 0x410 and 0x411 are an indirect register pair in that a
particular timing element is selected using register 0x410 and the configuration for
that timing element is programmed using register 0x411.
Name
—
—
Mindspeed Technologies
0 = Set timing reference for a Rx IMA Group
1 = Set timing reference for a Tx IMA Group
2 = Set timing source for Tx_TRL Outputs
3 = Set the Clock Divisor for an IMA group
Reserved. Set to 0.
Reserved. Set to 0.
For Multiplexer Type = 0, Multiplexer Type = 1, and Multiplexer Type = 3:
For Multiplexer Type = 2:
CX28224: 0–1: IMA Group 1–2
CX28225: 0–3: IMA Group 1–4
CX28229: 0–0xF: IMA Group 1–16
0–1: Tx_TRL[0]–Tx_TRL[1] output
Description
™
Registers
7
-
75