cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 3

• Manufacturer Part Number: cx28224
• Description: Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
• Manufacturer: Mindspeed Technologies

CX28224/5/9
Inverse Multiplexing for ATM (IMA) Family
The CX2822x family of devices provides system designers with a complete integrated
IMA solution for up to 32 ports. All devices include a Transmission Convergence
block to perform cell delineation, on-board RAM to meet ATM forum requirements
for differential delay compensation and a dual mode (UTOPIA or Serial) PHY layer
interface.
Source code for all required software functions is available from Mindspeed. Since
all processing intensive functions are performed in hardware, they require only
minimal overhead from the system processor.
The TC block is capable of bit level cell delineation, which allows for direct connection
DSL serial data streams without a frame sync pulse. Individual ports can be operated
in a 'pass thru' mode without the IMA overhead.
The CX28229 provides direct connection to 8 serial links or can be expanded to a 32
port IMA using the PHY side UTOPIA bus and external TC devices such as the
RS8228. In addition, an external memory bus allows the differential delay memory to
access up to 2 Mbytes of external RAM.
Functional Block Diagram
28229-DSH-001-D
CX28229
Internal
256Kx8
SRAM
IMA clocks
0
memory interface
Differential Delay
extmemsel pin
External Memory Interface
Engine
Rx Block
Tx Block
IMA
Mindspeed Technologies
1
JTAG
IMA Block
Micro interface
Counters
TC
™
OneSec
TC Block
TC Status
Registers
cell processor
cell processor
cell processor
cell processor
cell processor
cell processor
cell processor
cell processor
Clocks
Distinguishing Features
Micro
Complete IMA solution in a single package
Field tested software available
Supports up to 32 ports using external TC
PHYs
Up to 16 IMA groups
Supports the IMA standard requirements
for 25 ms differential delay with 256K
Internal memory
Memory expandable to 2 M bytes via
external bus (CX28229 only)
UTOPIA level 2 interfaces
Glueless interface to Mindspeed Framers
Octet or Bit level cell delineation
Variable link data rates (64K–3.072 Mb/s)
2 port, CX28224, 17mm BGA
4 port, CX28225, 17mm BGA
8/32 port, CX28229, 17mm BGA
TC Control
Line interface 0
Line interface 1
Line interface 2
Line interface 3
Line interface 4
Line interface 5
Line interface 6
Line interface 7
Registers
iii