cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 99

• Manufacturer Part Number: cx28224
• Description: Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
• Manufacturer: Mindspeed Technologies

CX28224/5/9 Data Sheet
Figure 6-2. Interrupt Indication Diagram (TC Block)
28229-DSH-001-D
General Notes:
(1)
NonZerGFCInt
NonZerGFCInt
This interrupt is generated by the associated external framer.
TXCELLINT (0x01EC)
RXCELLINT (0x01ED)
NonMatchInt
NonMatchInt
TXCELLINT (0x002C)
RXCELLINT (0x002D)
BusCnflctInt
BusCnflctInt
HECCorrInt
HECCorrInt
CellRcvdInt
CellRcvdInt
IdleRcvdInt
IdleRcvdInt
CellSentInt
CellSentInt
HECDetInt
HECDetInt
SOCErrInt
XmtOvflInt
RcvOvflInt
RcvrHldInt
SOCErrInt
XmtOvflInt
RcvOvflInt
RcvrHldInt
Reserved
Reserved
Reserved
Reserved
ParErrInt
ParErrInt
LOCDInt
LOCDInt
by ENCELLR (0x01E9)
by ENCELLT (0x01E8)
Input to latch Enabled
by ENCELLT (0x0028)
by ENCELLR (0x0029)
Input to latch Enabled
Input to latch Enabled
Input to latch Enabled
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
OR
OR
OR
OR
. .
.
OneSecInt
Mindspeed Technologies
Reserved
Reserved
Reserved
Reserved
OneSecInt
SUMINT (0x0000)
RxCellInt
TxCellInt
Reserved
Reserved
Reserved
Reserved
by ENSUMINT (0x0001)
RxCellInt
TxCellInt
by ENSUMINT (0x01C1)
SUMINT (0x01C0)
ExInt
Input to latch Enabled
ExInt
Input to latch Enabled
(1)
(1)
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Port 7
Port 0
OR
OR
by ENSUMPORT (0x0201)
EnIntPin
PortInt[7]
PortInt[6]
PortInt[5]
PortInt[4]
PortInt[3]
PortInt[2]
PortInt[1]
PortInt[0]
SUMPORT (0x0200)
™
Input to latch Enabled
MODE (0x0202)
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
OR
General Issues
MInt*
500027_016
6
-
5