cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 89

• Manufacturer Part Number: cx28224
• Description: Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
• Manufacturer: Mindspeed Technologies

CX28224/5/9 Data Sheet
5.2.4 Cell Scrambler
5.2.4.1
5.2.4.2
28229-DSH-001-D
The ATM standard requires cell scrambling to ensure that only valid headers are
found in the cell delineation process. Scrambling randomizes any repeated patterns or
other data strings that could be mistaken for valid headers. The CX2822x supports
two types of scrambling as defined by ITU-T I.432:
SSS Scrambling
SSS scrambling uses the polynomial ×
header bytes untouched. It can be enabled in EnTxCellScr, bit 5, of the CGEN register
(0x08).
Descrambling uses the same polynomial to recover the 48-byte cell payload. It can be
enabled in EnRxCellScr, bit 4, of the CVAL register (0x0C). SSS scrambling runs at
up to 45 Mbps.
DSS Scrambling
DSS scrambling uses the ×
the HEC byte. HEC is calculated after the first four bytes of the header have been
scrambled. DSS scrambling is enabled in EnTxDSSScr, bit 1, of the CGEN register
(0x08).
Descrambling uses the first six bits of the HEC for alignment. Once alignment is
found, all eight bits of the HEC are sampled. Descrambling uses the same polynomial
to recover the 48-byte cell payload. It is enabled in EnRxDSSScr, bit 0, of the CGEN
register (0x08). If DSS descrambling fails, the CX2822x defaults to unscrambled
mode.
NOTE:
1.
2.
Self Synchronizing Scrambler (SSS)
Distributed Sample Scrambler (DSS). Typically, SSS is used and is, therefore, the
CX2822x’s default method. However, xDSL in asynchronous format generally
use DSS.
If both SSS and DSS are enabled, SSS overrides DSS.
Mindspeed Technologies
31
+ ×
28
+ 1 polynomial to scramble the entire cell, except
43
+ 1 to scramble the payload, leaving the five
™
Transmission Convergence Block
5
-
7