cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 4

• Manufacturer Part Number: cx28224
• Description: Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
• Manufacturer: Mindspeed Technologies

28229-DSH-001-D
IMA Features
Field proven design
All software available
Supports variable link data rates (64K–
3.072 Mb/s)
Internal memory
Connects directly to the Mindspeed
SARs for inexpensive CPE solutions
CX28224 2 ports
CX28225 4 ports
CX28229 32 ports
Supports IMA versions 1.0 and 1.1
Fractional T1/E1
Memory expandable to 2 M bytes via
external bus
Up to 16 independent groups (using
external PHYs):
Each group can have up to 8 links.
Mindspeed Technologies
Cell Delineation Section
Control and Status
Microprocessor Interface
Supports ATM cell interface for:
Performs single-bit HEC correction and
single- or multiple-bit detection
Inserts headers and generates HEC
Direct connection to external
Mindspeed components for:
Byte-level or bit-level cell delineation
Asynchronous SRAM-like interface
mode
Synchronous, glueless Bt8233/RS8234
SAR interface mode
8-bit data bus
Open-drain interrupt output
Open-drain ready output
8–33 MHz operation
All control registers are read/write
Circuit-based physical layer
Cell-based physical layer
T1/E1
xDSL
General purpose mode
™
UTOPIA Interfaces
Counters/Status Register Section
UTOPIA Level 2 Interface to ATM Layer:
PHY-side UTOPIA Interface:
Summary interrupt indications
Configuration of interrupt enables
One-second counter latching
Counters for:
8/16 bit operation
50 MHz
8-bit UTOPIA Level 2
Supports 32 ports via dual CLAV
and Enable lines
LOCD events
Corrected HEC errors
Uncorrected HEC errors
Transmitted cells
Matching received cells
Non-matching received cells
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