cx28224 Mindspeed Technologies, cx28224 Datasheet - Page 156

• Manufacturer Part Number: cx28224
• Description: Cx28224/5/9 Inverse Multiplexing For The Atm Ima Family
• Manufacturer: Mindspeed Technologies

Registers
7-56
FOOTNOTE:
(1)
FOOTNOTE:
(1)
(2)
Bit
Bit
This status indicates an event that occurred since the register was last read.
This status reflects the current state of the circuit.
This status indicates an event that occurred since the register was last read.
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Default
Default
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0
0
0x2E—TXCELL (Transmit Cell Status Register)
0x2F—RXCELL (Receive Cell Status Register)
ParErr
SOCErr
TxOvfl
RxOvfl
CellSent
LOCD
HECDet
HECCorr
CellRcvd
IdleRcvd
NonMatch
NonZerGFC
(1)
The TXCELL register contains status for the cell transmitter. This register is cleared
on read.
The RXCELL register contains status for the cell receiver. This register is cleared on
read.
(1)
(1)
(1)
(1)
Name
Name
(2)
(1)
(2)
(2)
—
—
—
—
(2)
(2)
Mindspeed Technologies
When a logical 1 is read, this bit indicates that a parity error was received on the
transmit UTOPIA input data octet.
When a logical 1 is read, this bit indicates that a Start of Cell Error was received on
the UTxSOC pin (pin W12).
When a logical 1 is read, this bit indicates that a Transmit FIFO Overflow condition
occurred in the transmit UTOPIA FIFO.
When a logical 1 is read, this bit indicates that a Receive FIFO Overflow condition
occurred in the receive UTOPIA FIFO.
When a logical 1 is read, this bit indicates that a non-idle cell was formatted and
transmitted.
Reserved for factory test, ignore.
Reserved, set to a logical 0.
Reserved, set to a logical 0.
When a logical 1 is read, this bit indicates a Loss of Cell Delineation.
When a logical 1 is read, this bit indicates that an uncorrected HEC Error was
detected.
When a logical 1 is read, this bit indicates that a HEC Error was corrected.
Reserved, ignore this bit.
When logical 1 is read, this bit indicates that a valid cell was received.
When a logical 1 is read, this bit indicates that a cell with a header matching the
receive idle cell header value and mask criteria was received.
When a logical 1 is read, this bit indicates that a cell has been rejected by the cell
screening function.
When a logical 1 is read, this bit indicates that a cell with a Non-zero GFC field in the
header was received.
Description
Description
™
CX28224/5/9 Data Sheet
28229-DSH-001-D