SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 11

• Manufacturer Part Number: SC2200
• Description: Thin Client On a Chip
• Manufacturer: NSC [National Semiconductor]

Revision 3.0
Architecture Overview
1.1
The GX1 processor (silicon revision 8.1.1) is the central
module of the SC2200. For detailed information regarding
the GX1 module, refer to the G eode GX1 Processor Series
datasheet and the Geode GX1 Processor Series Silicon
Revision 8.1.1 errata .
The SC2200’s device ID is contained in the GX1 module.
Software can detect the revision by reading the DIR0 and
DIR1 Configuration registers (see Configuration registers
in the G eode GX1 Processor Series datasheet ). The
SC2200 device errata contains the specific values.
1.1.1
The GX1 module is connected to external SDRAM devices.
For more information see Section 2.4.2 "Memory Interface
Signals" on page 57, and the "Memory Controller" chapter
in the GX1 Processor Series datasheet .
GX_BASE+
Memory Offset
8400h-8403h
8404h-8407h
8408h-840Bh
840Ch-840Fh
8414h-8417h
8418h-841Bh
841Ch-841Fh
GX1 MODULE
Memory Controller
Width
(Bits)
32
32
32
32
32
32
32
Table 1-1. SC2200 Memory Controller Register Summary
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
(Continued)
Name/Function
MC_MEM_CNTRL1. Memory Controller Control Register 1
MC_MEM_CNTRL2. Memory Controller Control Register 2
MC_BANK_CFG. Memory Controller Bank Configuration
MC_SYNC_TIM1. Memory Controller Synchronous Timing
Register 1
MC_GBASE_ADD. Memory Controller Graphics Base
Address Register
MC_DR_ADD. Memory Controller Dirty RAM Address
Register
MC_DR_ACC. Memory Controller Dirty RAM Access
Register
11
There are some differences in the SC2200’s memory con-
troller and the stand-alone GX1 processor’s memory con-
troller:
1)
2)
Table 1-1 summarizes the 32-bit registers contained in the
SC2200’s memory controller. Table 1-2 gives detailed reg-
ister/bit formats.
There is drive strength/slew control in the SC2200 that
is not in the GX1. The bits that control this function are
in the MC_MEM_CNTRL1 and MC_MEM_CNTRL2
registers. In the GX1 processor, these bits are marked
as reserved.
The SC2200 supports two banks of memory. The GX1
supports four banks of memory. In addition, the
SC2200 supports a maximum of eight devices and the
GX1 supports up to 32 devices. With this difference,
the MC_BANK_CFG register is different.
Reset Value
248C0040h
2A733225h
00000801h
41104110h
00000000h
00000000h
0000000xh
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