SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 392

• Manufacturer Part Number: SC2200
• Description: Thin Client On a Chip
• Manufacturer: NSC [National Semiconductor]

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Electrical Specifications
Notes:
1)
2)
3)
4)
5)
6)
Device address consists of signals IDE_CS[0:1]# and IDE_ADDR[2:0].
Negation of IDE_IORDY0,1 is used to extend the PIO cycle. The determination of whether or not the cycle is to be
extended is made by the host after t
Device never negates IDE_IORDY[0:1]. Device keeps IDE_IORDY[0:1] released, and no wait is generated.
Device negates IDE_IORDY[0:1] before t
released, and no wait is generated.
Device negates IDE_IORDY[0:1] before t
more than 5 ns before release. A wait is generated.
The cycle completes after IDE_IORDY[0:1] is reasserted. For cycles where a wait is generated and IDE_IOR[0:1] is
asserted, the device places read data on IDE_DATA[15:0] for t
IDE_IOR0#
IDE_IOW0#
WRITE
IDE_DATA[7:0]
READ
IDE_DATA[7:0]
IDE_IORDY0
IDE_IORDY0
IDE_IORDY0
ADDR valid
1
2,3
2,4
2,5
Figure 8-24. Register Transfer to/from Device Timing Diagram
(Continued)
A
t
1
from the assertion of IDE_IOR[0:1]# or IDE_IOW[0:1]#.
A
A
. IDE_IORDY[0:1] is released prior to negation and may be asserted for no
but causes IDE_IORDY[0:1] to be asserted before t
t
t
0
A
392
t
t
C
2
RD
before asserting IDE_IORDY[0:1].
t
B
t
3
t
t
5
RD
t
t
C
4
t
6
t
t
6z
9
t
2i
A
. IDE_IORDY[0:1] is
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