SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 241

• Manufacturer Part Number: SC2200
• Description: Thin Client On a Chip
• Manufacturer: NSC [National Semiconductor]

Revision 3.0
Core Logic Module
Offset 1Ch-1Fh
31:12
Bit
11
10
9
8
7
6
5
4
3
2
1
Table 5-31. F0BAR1+I/O Offset: LPC Interface Configuration Registers (Continued)
Description
Reserved. Must be set to 0.
LPCPD# Override Enable. Determines how LPCPD# output is controlled.
0: ACPI logic.
1: LPCPD# Override Value bit (bit 10 of this register).
LPCPD# Override Value. Selects value of LPCPD# output if bit 11 of this register is set to 1.
0: Power down sequence.
1: Normal power.
SMI Serial IRQ Enable. Allows serial IRQ to generate an SMI.
0: Disable.
1: Enable.
Top Level SMI status is reported at F1BAR0+I/O Offset 02h[3].
Second level status is reported at bit 6 of this register.
SMI Configuration for LPC Error Enable. Allows LPC errors to generate an SMI.
0: Disable.
1: Enable.
Top Level SMI status is reported at F1BAR0+I/O Offset 02h[3].
Second level status is reported at bit 5 of this register.
LPCPD# Pin Status. (Read Only) Reflects the current value of the LPCPD# output signal.
SMI Source is Serial IRQ. Indicates whether or not an SMI was generated by an SERIRQ.
0: No.
1: Yes.
Write 1 to clear.
To enable SMI generation, set bit 9 of this register to 1.
This is the second level of status reporting. The top level status is reported in F1BAR0+I/O Offset 02h[3].
Writing a 1 to this bit also clears the top level status bit as long as bit 5 of this register is cleared.
LPC Error Status. Indicates whether or not an SMI was generated by an error that occurred on LPC.
0: No.
1: Yes.
Write 1 to clear.
To enable SMI generation, set bit 8 of this register to 1.
This is the second level of status reporting. The top level status is reported in F1BAR0+I/O Offset 02h[3].
Writing a 1 to this bit also clears the top level status bit as long as bit 6 of this register is cleared.
LPC Multiple Errors Status. Indicates whether or not multiple errors have occurred on LPC.
0: No.
1: Yes.
Write 1 to clear.
LPC Timeout Error Status. Indicates whether or not an error was generated by a timeout on LPC.
0: No.
1: Yes.
Write 1 to clear.
LPC Error Write Status. Indicates whether or not an error was generated during a write operation on LPC.
0: No.
1: Yes.
Write 1 to clear.
LPC Error DMA Status. Indicates whether or not an error was generated during a DMA operation on LPC.
0: No.
1: Yes.
Write 1 to clear.
(Continued)
LPC_ERR_SMI — LPC Error SMI Register (R/W)
241
Reset Value: 00000080h
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