SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 235

• Manufacturer Part Number: SC2200
• Description: Thin Client On a Chip
• Manufacturer: NSC [National Semiconductor]

Revision 3.0
Core Logic Module
5.4.1.2
F0 Index 14h, Base Address Register 1 (F0BAR1) points to
the base address of the register space that contains the
configuration registers for LPC support. Table 5-31 gives
the bit formats of the I/O mapped registers accessed
through F0BAR1.
Offset 00h-03h
31:21
Bit
20
19
18
17
16
15
14
13
12
11
10
9
8
7
LPC Support Registers
Description
Reserved.
INTD Source. Selects the interface source of the INTD# signal.
0: PCI - INTD#. (Program PMR[24] = 1 to enable INTD# function on ball.)
1: LPC - SERIRQ. (Program PMR[14] = 1 and PMR[22] = 1 or LPC_ROM strap = 1 to enable SERIRQ function on ball.)
INTC Source. Selects the interface source of the INTC# signal.
0: PCI - INTC#. (Program PMR[4] =1 and PMR[9] = 0 to enable INTD# function on ball.
1: LPC - SERIRQ. (Program PMR[14] = 1 and PMR[22] = 1 or LPC_ROM strap = 1 to enable SERIRQ function on ball.)
INTB Source. Selects the interface source of the INTB# signal.
0: PCI - INTB#.
1: LPC - SERIRQ. (Program PMR[14] = 1 and PMR[22] = 1 or LPC_ROM strap = 1 to enable SERIRQ function on ball.)
INTA Source. Selects the interface source of the INTA# signal.
0: PCI - INTA#.
1: LPC - SERIRQ. (Program PMR[14] = 1 and PMR[22] = 1 or LPC_ROM strap = 1 to enable SERIRQ function on ball.)
Reserved. Set to 0.
IRQ15 Source. Selects the interface source of the IRQ15 signal.
0: ISA - IRQ15. (Program PMR[18] = 0 and PMR[8] = 1 to enable IRQ15 function on ball.)
1: LPC - SERIRQ. (Program PMR[14] = 1 and PMR[22] = 1 or LPC_ROM strap = 1 to enable SERIRQ function on ball.)
IRQ14 Source. Selects the interface source of the IRQ14 signal.
0: ISA - IRQ14. (Program PMR[24] = 0 to enable IRQ14 function on ball.)
1: LPC - SERIRQ. (Program PMR[14] = 1 and PMR[22] = 1 or LPC_ROM strap = 1 to enable SERIRQ function on ball.)
IRQ13 Source. Selects the interface source of the internal IRQ13 signal.
0: ISA - IRQ13. (Internal signal - An input from the CPU indicating that a floating point error has been detected and that
1: LPC - SERIRQ. (Program PMR[14] = 1 and PMR[22] = 1 or LPC_ROM strap = 1 to enable SERIRQ function on ball.)
IRQ12 Source. Selects the interface source of the IRQ12 signal.
0: ISA - IRQ12. (Unavailable externally.)
1: LPC - SERIRQ (Program PMR[14] = 1 and PMR[22] = 1 or LPC_ROM strap = 1 to enable SERIRQ function on ball.)
IRQ11 Source. Selects the interface source of the IRQ11 signal.
0: ISA - IRQ11 (Unavailable externally.)
1: LPC - SERIRQ (Program PMR[14] = 1 and PMR[22] = 1 or LPC_ROM strap = 1 to enable SERIRQ function on ball.)
IRQ10 Source. Selects the interface source of the IRQ10 signal.
0: ISA - IRQ10. (Unavailable externally.)
1: LPC - SERIRQ. (Program PMR[14] = 1 and PMR[22] = 1 or LPC_ROM strap = 1 to enable SERIRQ function on ball.)
IRQ9 Source. Selects the interface source of the IRQ9 signal.
0: ISA - IRQ9. (Program PMR[24] = 1.)
1: LPC - SERIRQ. (Program PMR[14] = 1 and PMR[22] = 1 or LPC_ROM strap = 1 to enable SERIRQ function on ball.)
IRQ8# Source. Selects the interface source of the IRQ8# signal.
0: ISA - IRQ8# (Internal signal - Connected to internal RTC.)
1: LPC - SERIRQ (Program PMR[14] = 1 and PMR[22] = 1 or LPC_ROM strap = 1 to enable SERIRQ function on ball.)
IRQ7 Source. Selects the interface source of the IRQ7 signal.
0: ISA - IRQ7. (Unavailable externally.)
1: LPC - SERIRQ. (Program PMR[14] = 1 and PMR[22] = 1 or LPC_ROM strap = 1 to enable SERIRQ function on ball.)
internal INTR should be asserted.)
Table 5-31. F0BAR1+I/O Offset: LPC Interface Configuration Registers
(Continued)
SERIRQ_SRC — Serial IRQ Source Register (R/W)
235
The LPC Interface supports all features described in the
LPC bus specification 1.0, with the following exceptions:
• Only 8- or 16-bit DMA, depending on channel number.
• Only one external DRQ pin.
Does not support the optional larger transfer sizes.
Reset Value: 00000000h
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