SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 381
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SC2200
Manufacturer Part Number
SC2200
Description
Thin Client On a Chip
Manufacturer
NSC [National Semiconductor]
Datasheet
1.SC2200.pdf
(433 pages)
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Revision 3.0
Electrical Specifications
1.
2.
3.
4.
5.
6.
7.
Symbol
t
t
t
t
t
t
t
t
t
t
PCICLK
VAL
VAL
ON
OFF
SU
SU
H
RST
RST-CLK
RST-OFF
See the timing measurement conditions in Figure 8-16.
Minimum times are evaluated with same load used for slew rate measurement (as shown in note 3 of Table ); maximum
times are evaluated with the load circuits shown in Figure 8-15, for high-going and low-going edges respectively.
Not 100% tested.
REQ# and GNT# are point-to-point signals, and have different output valid delay and input setup times than do signals
on the bus. GNT# has a setup time of 10 ns; REQ# has a setup time of 12 ns. All other signals are sent via the bus.
See the timing measurement conditions in Figure 8-17.
PCIRST# is asserted and deasserted asynchronously with respect to PCICLK (see Figure 8-18).
All output drivers are asynchronously floated when PCIRST# is active.
(ptp)
(ptp)
0.3 V
0.4 V
0.5 V
Parameter
PCICLK to Signal Valid Delay
PCICLK to Signal Valid Delay
Float to Active Delay
Active to Float Delay
Input Setup Time to PCICLK
Input Setup Time to PCICLK
(point-to-point)
Input Hold Time from PCICLK
PCIRST# Active Time After Power Stable
PCIRST# Active Time After PCICLK Stable
PCIRST# Active to Output Float Delay
IO
IO
IO
Figure 8-14. PCICLK Timing and Measurement Points
1,3
1,3
(Continued)
t
HIGH
0.6V
Table 8-19. PCI Timing Parameters
4,5
4,5
1,2,4
1,2,4
5
IO
(on the bus)
(on the bus)
(point-to-point)
3,6,7,
6,3
6,3
t
CYC
381
10,12
Min
100
2
2
2
7
0
1
0.2V
t
LOW
IO
Max
11
12
28
40
Unit
ms
ns
ns
ns
ns
ns
ns
ns
µs
ns
0.4 V
Comments
(minimum)
www.national.com
IO
, p-to-p
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