SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 333

• Manufacturer Part Number: SC2200
• Description: Thin Client On a Chip
• Manufacturer: NSC [National Semiconductor]

Revision 3.0
Video Processor Module
6.2.7
The integrated (CRT) PLL can generate frequencies up to
135 MHz from a single 27 MHz source. The clock fre-
quency is programmable using two registers. Figure 6-15
shows the block diagram of the Video Processor integrated
PLL.
F
integrated oscillator. F
REF
F
REF
F
is 27 MHz, generated by an external crystal and an
OUT
Integrated PLL
= (m + 1) / (n+ 1) x F
Divider
n
OUT
is calculated from:
REF
(Continued)
Compare
Phase
Figure 6-15. PLL Block Diagram
Divider
m
Charge
Pump
333
The integrated PLL can generate any frequency by writing
into the CRT-m and CRT-n bit fields (FBAR0+Memory Off-
set 2Ch). Additionally, 16 preprogrammed VGA frequencies
can be selected via the PLL Clock Select register
(F4BAR0+Memory Offset 2Ch[19:16]), if the crystal oscilla-
tor has a frequency of 27 MHz. This PLL can be powered
down via the Miscellaneous register (F4BAR0+Memory
Offset 28h[12]).
Loop
Filter
VCO
Divide
Out
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F
OUT