SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 361

• Manufacturer Part Number: SC2200
• Description: Thin Client On a Chip
• Manufacturer: NSC [National Semiconductor]

Revision 3.0
Electrical Specifications
1.
1.
2.
3.
Symbol
I
I
Symbol
I
I
I
I
I
I
I
CC3ONTFT
CCCRT
CC3IDLE
CC3SLP
COREIDLE
CORESLP
SBOFF
SBLOFF
BAT
f
f
All inputs are at 0.2V or V
0 mA).
All V
(static I
CLK
CLK
SBL
ratings refer to internal clock frequency.
ratings refer to internal clock frequency.
OUT
supplied inputs are at 0.2V or V
Parameter
f
(Nominal); CPU mode = Active Idle
f
(Nominal); CPU mode = Active Idle
f
(Nominal); CPU mode = Active Idle
I/O Current @ V
CPU mode = Sleep
f
1.8V (Nominal); CPU mode = Active Idle
f
1.8V (Nominal); CPU mode = Active Idle
f
1.8V (Nominal); CPU mode = Active Idle
Core Current @ V
CPU mode = Sleep
Core Current @ V
CPU mode = Sleep
SB Current @ V
CPU mode = Off
SBL Current @ V
CPU mode = Off
SBL Current @ V
CPU mode = Off
BAT Current @ V
CPU mode = Off
CLK
CLK
CLK
CLK
CLK
CLK
Parameter
I/O current contribution if TFT display is
used
If CRT interface is used: CCCRT Current @
V
= 0 mA).
CCCRT
= 233 MHz, I/O Current @ V
= 266 MHz, I/O Current @ V
= 300 MHz, I/O Current @ V
= 233 MHz, Core Current @ V
= 266 MHz, Core Current @ V
= 300 MHz, Core Current @ V
Table 8-6. DC Characteristics for Active Idle, Sleep, and Off Modes
= 3.3 (Nominal); CPU mode = On
1
1
Table 8-5. DC Characteristics On Mode (Continued)
IO
IO
SB
BAT
SBL
SBL
– 0.2 (CMOS levels). All inputs are held static, and all outputs are unloaded (static I
CORE
CORE
= 3.3V (Nominal);
= 3.3V (Nominal);
(Continued)
= 3.0 (Nominal);
= 1.8V (Nominal);
= 2.0V (Nominal);
= 1.8V (Nominal);
= 2.0V (Nominal);
SBL
IO
IO
IO
– 0.2 (CMOS levels). All inputs are held static, and all outputs are unloaded
CORE
CORE
CORE
= 3.3V
= 3.3V
= 3.3V
=
=
=
361
Min
Typ Avg
30
60
Typ
230
240
250
360
380
450
20
20
20
<1
<1
<1
7
Abs Max
50
80
Max
30
30
30
Unit
Unit
mA
mA
mA
mA
mA
mA
mA
mA
µA
Comments
I
I
I
I
I
T
CC
CC
CC
CC
CC
C
Comments
= 25°C
for V
for V
for V
for V
for V
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IO
IO
CORE
CORE
SBL
2
3
2
OUT
=