SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 58
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SC2200
Manufacturer Part Number
SC2200
Description
Thin Client On a Chip
Manufacturer
NSC [National Semiconductor]
Datasheet
1.SC2200.pdf
(433 pages)
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Signal Definitions
2.4.2
Signal Name
CS1#
CS0#
RASA#
CASA#
WEA#
DQM7
DQM6
DQM5
DQM4
DQM3
DQM2
DQM1
DQM0
CKEA
SDCLK3
SDCLK2
SDCLK1
SDCLK0
SDCLK_IN
Memory Interface Signals (Continued)
EBGA
AK29
AC30
AC28
AH16
AC29
AL26
AF31
AL20
AJ20
AJ26
AJ21
AJ16
AJ30
M31
P29
N31
N30
N29
T28
(Continued)
Ball No.
TEPBGA
AH27
AH12
AG29
AC31
AG30
AH23
AK12
AB31
AK21
AA28
AL12
AJ12
AL15
AL11
AL22
AJ21
AJ27
W29
V29
Type
O
O
O
O
O
O
O
I
Description
Chip Selects. These bits are used to select
the module bank within system memory.
Each chip select corresponds to a specific
module bank. If CS# is high, the bank(s) do
not respond to RAS#, CAS#, and WE# until
the bank is selected again.
Row Address Strobe. RAS#, CAS#, WE#
and CKE are encoded to support the different
SDRAM commands. RASA# is used with
CS[1:0]#.
Column Address Strobe. RAS#, CAS#,
WE# and CKE are encoded to support the
different SDRAM commands. CASA# is used
with CS[1:0]#.
Write Enable. RAS#, CAS#, WE# and CKE
are encoded to support the different SDRAM
commands. WEA# is used with CS[1:0]#.
Data Mask Control Bits. During memory
read cycles, these outputs control whether
SDRAM output buffers are driven on the MD
bus or not. All DQM signals are asserted dur-
ing read cycles.
During memory write cycles, these outputs
control whether or not MD data is written into
SDRAM.
DQM[7:0] connect directly to the [DQM7:0]
pins of each DIMM connector.
Clock Enable. These signals are used to
enter Suspend/power-down mode. CKEA is
used with CS[1:0]#.
If CKE goes low when no read or write cycle
is in progress, the SDRAM enters power-
down mode. To ensure that SDRAM data
remains valid, the self-refresh command is
executed. To exit this mode, and return to
normal operation, drive CKE high.
These signals should have an external pull-
down resistor of 33 K .
SDRAM Clocks. SDRAM uses these clocks
to sample all control, address, and data lines.
To ensure that the Suspend mode functions
correctly, SDCLK3 and SDCLK1 should be
used with CS1#. SDCLK2 and SDCLK0
should be used together with CS0#.
SDRAM Clock Input. The SC2200 samples
the memory read data on this clock. Works in
conjunction with the SDCLK_OUT signal.
58
Mux
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