SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 325

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SC2200

Manufacturer Part Number
SC2200
Description
Thin Client On a Chip
Manufacturer
NSC [National Semiconductor]
Datasheet

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Revision 3.0
Video Processor Module
6.2.2.3
After the data has been optionally horizontally downscaled
the video data is stored in a 3-line buffer. Each line is 360
DWORDs, which means a line width of up to 720 pixels can
be stored. This buffer supports two functions. First, the
clock domain of the video data changes from the GX1
module’s video clock to the GX1 module’s graphics clock.
This clock domain change is required because the video
data and graphics data can only be mixed/blended in the
same clock domain. The second function the line buffer
performs is to provide the necessary look ahead and look
behind data in the vertical direction for the vertical
upscaler. There is no direct program control of the line
buffer.
6.2.2.4
Video data in YUV 4:2:2 or YUV 4:2:0 format is converted
to YUV 4:4:4 format. RGB data is not translated. There is
no direct program control of the Formatter.
Line Buffers
Formatter
y
A
i,j
b
A
1
i+1,j
x
Figure 6-9. Linear Interpolation Calculation
(Continued)
z
A
b
A
2
i,j+1
i+1,j+1
325
Notes:
x and y are 0 - 7
6.2.2.5
After the video data has been buffered, the upscaling algo-
rithm can be applied. The Video Processor employs a Digi-
tal Differential Analyzer-style (DDA) algorithm for both
horizontal and vertical upscaling. The scaling parameters
are
(F4BAR0+Memory Offset 10h). The scalers support up to
8x factors for both horizontal and vertical scaling. The
scaled video pixel stream is then passed through bi-linear
interpolating filters (2-tap, 8-phase) to smooth the output
video, significantly enhancing the quality of the displayed
image.
The X and Y Upscaler uses the DDA and linear interpolat-
ing filter to calculate (via interpolation) the values of the pix-
els to be generated. The interpolation formula uses A
A
intermediate points. The actual location of calculated
points is determined by the DDA algorithm.
The location of each intermediate point is one of eight
phases between the original pixels (see Figure 6-9).
b 1
b 2
z
i,j+1
=
=
, A
=
programmed
b 1
i+1,j
A i j ,
A i j ,
2-Tap Vertical and Horizontal Upscalers
8 x
----------- -
, and A
8
+
8 y
----------- -
1
8
+
8 y
----------- -
i+1,j+1
+
8
b 2
via
A i
+
-- -
8
x
values to calculate the value of
+
the
A i
1 j ,
+
1 j
Video
-- -
8
y
,
+
1
Upscale
y
-- -
8
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i,j
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