SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 294

• Manufacturer Part Number: SC2200
• Description: Thin Client On a Chip
• Manufacturer: NSC [National Semiconductor]

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Core Logic Module
Offset 2Ch-2Fh
Offset 30h-33h
Offset 34h-37h
Offset 38h-3Bh
Offset 3Ch-3Fh
Offset 40h-43h
Offset 44h-47h
Offset 48h-4Bh
30:16
15:14
30:14
31:16
31:14
31:12
31:24
23:13
31:4
31:4
13:0
13:0
15:0
13:0
11:0
3:0
3:0
Bit
31
31
12
11
10
Description
BulkCurrentED. Pointer to the current Bulk List ED.
Reserved. Read/Write 0s.
DoneHead. Pointer to the current Done List Head ED.
Reserved. Read/Write 0s.
FrameIntervalToggle (Read Only). This bit is toggled by HCD when it loads a new value into FrameInterval.
FSLargestDataPacket (Read Only). This field specifies a value which is loaded into the Largest Data Packet Counter at
the beginning of each frame.
Reserved. Read/Write 0s.
FrameInterval. This field specifies the length of a frame as (bit times - 1). For 12,000 bit times in a frame, a value of 11,999
is stored here.
FrameRemainingToggle (Read Only). Loaded with FrameIntervalToggle when FrameRemaining is loaded.
Reserved. Read 0s.
FrameRemaining (Read Only). When the HC is in the UsbOperational state, this 14-bit field decrements each 12 MHz
clock period. When the count reaches 0, (end of frame) the counter reloads with FrameInterval. In addition, the counter
loads when the HC transitions into UsbOperational.
Reserved. Read 0s.
FrameNumber (Read Only). This 16-bit incrementing counter field is incremented coincident with the loading of FrameR-
emaining. The count rolls over from FFFFh to 0h.
Reserved. Read/Write 0s.
PeriodicStart. This field contains a value used by the List Processor to determine where in a frame the Periodic List pro-
cessing must begin.
Reserved. Read/Write 0s.
LSThreshold. This field contains a value used by the Frame Management block to determine whether or not a low speed
transaction can be started in the current frame.
PowerOnToPowerGoodTime. This field value is represented as the number of 2 ms intervals, ensuring that the power
switching is effective within 2 ms. Only bits [25:24] are implemented as R/W. The remaining bits are read only as 0. It is not
expected that these bits be written to anything other than 1h, but limited adjustment is provided. This field should be written
to support system implementation. This field should always be written to a non-zero value.
Reserved. Read/Write 0s.
NoOverCurrentProtection. This bit should be written to support the external system port over-current implementation.
0: Over-current status is reported.
1: Over-current status is not reported.
OverCurrentProtectionMode. This bit should be written 0 and is only valid when NoOverCurrentProtection is cleared.
0: Global Over-Current.
1: Individual Over-Current
DeviceType (Read Only). USB is not a compound device.
Table 5-42. USB_BAR+Memory Offset: USB Controller Registers (Continued)
(Continued)
HcFrameRemaining Register (RO)
HcBulkCurrentED Register (R/W)
HcRhDescriptorA Register (R/W)
HcPeriodicStart Register (R/W)
HcLSThreshold Register (R/W)
HcDoneHead Register (R/W)
HcFmInterval Register (R/W)
HcFmNumber Register (RO)
294
Reset Value = 00002EDFh
Reset Value = 00000000h
Reset Value = 00000000h
Reset Value = 00000000h
Reset Value = 00000000h
Reset Value = 00000000h
Reset Value = 00000628h
Reset Value = 01000003h
Revision 3.0