SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 385

• Manufacturer Part Number: SC2200
• Description: Thin Client On a Chip
• Manufacturer: NSC [National Semiconductor]

Revision 3.0
Electrical Specifications
8.3.6
All output timing is guaranteed for 50 pF load, unless otherwise specified.
The ISA Clock divisor (defined in F0 Index 50h[2:0] of the Core Logic module) is 011.
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
RD1
RD2
RD3
RD4
RD5
RCU1
RCU2
RCU3
WR1
WR2
WR3
WR4
WR5
WCU1
WCU2
WCU3
RDYH
RDYA1
Sub-ISA Interface
Parameter
MEMR#/DOCR#/RD#/TRDE# Read
active pulse width FE to RE
MEMR#/DOCR#/RD#/TRDE# Read
active pulse width FE to RE
IOR#/RD#/TRDE# Read active pulse
width FE to RE
IOR#/MEMR#/DOCR#/RD#/TRDE#
Read active pulse width FE to RE
IOR#/MEMR#/DOCR#/RD#/TRDE#
Read active pulse width FE to RE
MEMR#/DOCR#/RD#/TRDE#
inactive pulse width
MEMR#/DOCR#/RD#/TRDE#
inactive pulse width
IOR#/RD#/TRDE# inactive pulse
width
MEMW#/WR# Write active pulse
width FE to RE
MEMW#/DOCW#/WR# Write active
pulse width FE to RE
IOW#/WR# Write active pulse width
FE to RE
IOW#/MEMW#/DOCW#/WR# Write
active pulse width FE to RE
IOW#/MEMW#/DOCW#/WR# Write
active pulse width FE to RE
MEMW#/WR#/DOCW# inactive pulse
width
MEMW#/WR#/DOCW# inactive pulse
width
IOW#/WR# inactive pulse width
IOR#/MEMR#/RD#/DOCR#/IOW#/
MEMW#/WR#/DOCW# Hold after
IOCHRDY RE
IOCHRDY valid after IOR#/MEMR#/
RD#/DOCR#/IOW#/MEMW#/WR#/
DOCW# FE
(Continued)
Table 8-21. Sub-ISA Timing Parameters
Width
(Bits)
8, 16
8, 16
8, 16
Bus
16
16
16
16
16
16
16
16
16
8
8
8
8
8
8
385
M, I/O
M, I/O
M, I/O
M, I/O
M, I/O
M, I/O
Type
I/O
I/O
I/O
I/O
M
M
M
M
M
M
M
M
(ns)
Min
225
105
160
520
160
103
163
163
225
105
160
520
160
103
163
163
120
Max
(ns)
78
Figure
8-19
8-19
8-19
8-19
8-19
8-19
8-19
8-19
8-20
8-20
8-20
8-20
8-20
8-20
8-20
8-20
8-19
8-20
8-19
8-20
Comments
Standard
Zero wait state
Standard
Standard
Zero wait state
Standard
Zero wait state
Standard
Standard
Zero wait state
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