SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 127

• Manufacturer Part Number: SC2200
• Description: Thin Client On a Chip
• Manufacturer: NSC [National Semiconductor]

Revision 3.0
SuperI/O Module
Offset 00h
This register is set to 00h on power-up of V
5.2.9.4 "Power Management Events" on page 169.)
Offset 01h
This register is set to 03h on power-up of V
ACPI controller and/or a PME to the Core Logic module. (See Section 5.2.9.4 "Power Management Events" on page 169.)
Offset 02h
This register is set to 00h on power-up of V
4:2
4:2
7:5
1:0
Bit
7
6
5
1
0
7
6
5
1
0
4
3
2
Description
Reserved.
Reserved. Must be set to 0.
IRRX1 (CEIR) Event Status. This sticky bit shows the status of the CEIR event detection.
0: Event not detected. (Default)
1: Event detected.
Reserved.
RI2# Event Status. This sticky bit shows the status of RI2# event detection.
0: Event not detected. (Default)
1: Event detected.
SDATA_IN2 Event Status. This sticky bit shows the status of Audio Codec event detection.
0: Event not detected. (Default)
1: Event detected.
Reserved.
Reserved. Must be set to 0.
IRRX1 (CEIR) Event Enable.
0: Disable. (Default)
1: Enable.
Reserved.
RI2# Event Enable.
0: Disable.
1: Enable. (Default)
SDATA_IN2 Event Enable.
0: Disable.
1: Enable. (Default)
Reserved.
Reserved. Must be set to 0.
Reserved. Must be set to 0.
Reserved.
Configuration Bank Select Bits.
00: Only shared registers are accessible.
01: Shared registers and Bank 1 (CEIR) registers are accessible.
10: Bank selected.
11: Reserved.
Table 4-29. Banks 0 and 1 - Common Control and Status Registers
(Continued)
Wakeup Events Status Register - WKSR (R/W1C)
Wakeup Configuration Register - WKCFG (R/W)
Wakeup Events Control Register - WKCR (R/W)
PP
PP
PP
or software reset. Detected wakeup events that are enabled issue a power-up request the
or software reset. It indicates which wakeup event and/or PME occurred. (See Section
or software reset. It enables access to CEIR registers.
127
Reset Value: 00h
Reset Value: 03h
Reset Value: 00h
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