SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 90

• Manufacturer Part Number: SC2200
• Description: Thin Client On a Chip
• Manufacturer: NSC [National Semiconductor]

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General Configuration Block
Offset 04h
This register contains WATCHDOG status information.
Offset 05h-07h
Bit
7:4
3
2
1
0
Description
Reserved. Write as read.
WDRST (WATCHDOG Reset Asserted) (Read Only) This bit is set to 1 when WATCHDOG Reset is asserted. It is set to 0
when POR# is asserted, or when the WDOVF bit is set to 0.
WDSMI (WATCHDOG SMI Asserted.) (Read Only) This bit is set to 1 when WATCHDOG SMI is asserted. It is set to 0
when POR# is asserted, or when the WDOVF bit is set to 0.
WDINT (WATCHDOG Interrupt Asserted, Read Only). This bit is set to 1 when the WATCHDOG Interrupt is asserted. It is
set to 0 when POR# is asserted, or when the WDOVF bit is set to 0.
WDOVF (WATCHDOG Overflow). This bit is set to 1 when the WATCHDOG Timer reaches 0. It is set to 0 when POR# is
asserted, or when a 1 is written to this bit by software. Other system reset sources do not affect this bit.
Table 3-3. WATCHDOG Registers (Continued)
WATCHDOG Status Register - WDSTS (R/WC)
(Continued)
Reserved - RSVD
90
Reset Value: 00h
Revision 3.0