SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 150

• Manufacturer Part Number: SC2200
• Description: Thin Client On a Chip
• Manufacturer: NSC [National Semiconductor]

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5.0
The Core Logic module is an enhanced PCI-to-Sub-ISA
bridge (South Bridge), this module is ACPI-compliant, and
provides AT/Sub-ISA functionality. The Core Logic module
also contains state-of-the-art power management. Two bus
mastering IDE controllers are included for support of up to
four ATA-compliant devices. A three-port Universal Serial
Bus (USB) provides high speed, and Plug & Play expan-
sion for a variety of new consumer peripheral devices.
5.1
Internal Fast-PCI Interface
The internal Fast-PCI bus interface is used to connect the
Core Logic and GX1 modules of the SC2200. This inter-
face includes the following features:
• PCI protocol for transfers on Fast-PCI bus
• Up to 66 MHz operation
• Subtractive decode handled internally in conjunction
Bus Mastering IDE Controllers
• Two controllers with support for up to four IDE devices
• Independent timing for master and slave devices for both
• PCI bus master burst reads and writes
• Multiword DMA support
• Programmed I/O (PIO) Modes 0-4 support
Universal Serial Bus
• Three independent USB interfaces
• Open Host Controller Interface (OpenHCI) specification
PCI Interface
• PCI 2.1 compliant
• PCI master for AC97 and IDE controllers
• Subtractive agent for unclaimed transactions
• Supports PCI initiator-to-Sub-ISA cycle translations
• PCI-to-Sub-ISA interrupt mapper/translator
• External PCI bus
with external PCI bus
channels
compliant
— Devices internal to the Core Logic module (IDE,
— Legacy DMA is not supported to memory located on
— The Core Logic module does not transfer subtrac-
Audio, USB, Sub-ISA, etc.) cannot master to memory
through the external PCI bus.
external PCI bus.
tively decoded I/O cycles originating from the
external PCI bus.
FEATURE LIST
Core Logic Module
150
AT Compatibility
• 8259A-equivalent interrupt controllers
• 8254-equivalent timer
• 8237-equivalent DMA controllers
• Port A, B, and NMI logic
• Positive decode for AT I/O space
Sub-ISA Interface
• Boot ROM chip select
• Extended ROM to 16 MB
• Two general-purpose chip selects
• NAND Flash support
• M-Systems DiskOnChip support
Power Management
• Automated CPU 0V Suspend modulation
• I/O Traps and Idle Timers for peripheral power manage-
• Software SMI and Stop Clock for APM support
• ACPI-compliant timer and register set
• Up to 22 GPIOs of which all can generate Power
• Three Dedicated GPWIOs powered by V
• Shadow register support for legacy controllers for 0V
Integrated Audio
• AC97 Version 2.0 compliant interface to audio codecs
• Secondary codec support
• AMC97 codec support
Video Processor Interface
• Synchronous serial interface to the Video Processor
• Translates video and clock control register accesses
• Supports both reads and writes of Video Processor
• Retries Fast-PCI bus accesses until Core Logic
Low Pin Count (LPC) Interface
• Based on Intel LPC Interface Specification Revision 1.0
• Serial IRQ support
ment
Management Interrupts (PMEs)
Suspend
from PCI to serial interface
registers
completes the transfer over the serial interface
SBL
and V
Revision 3.0
SB